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mc: decode IP28 128 MB banks as two subbanks - #440

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techomancer merged 1 commit into
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jamesbraid:ip28-mc-128mb-banks
Nov 7, 2026
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techomancer merged 1 commit into
techomancer:mainfrom
jamesbraid:ip28-mc-128mb-banks

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With the default banks = [128, 128, 0, 0] (and with [128, 0, 0, 0]) the Indigo2 R10000 profile (indigo2_ip28) never gets past the PROM's memory test:

Address: 2000000c Expected: 00000000 Received: 00000001 <SIMM S9>
No usable memory found.  Make sure you have a full bank (4 SIMMs).

iris described a 128 MB IP28 bank as one 128 MB subbank. The PROM sizes a bank in two steps: it maps it with the subbank bit (BNK) clear and finds where it aliases, then sets BNK (MEMCFG half 0x7f20) and looks for a second subbank. iris showed it a 128 MB alias and no second subbank, so the PROM settled on 256 MB (0x2f20). In that decode 0x2800000c aliases 0x2000000c, and the data test failed there.

The MC spec's size table makes every other size two subbanks (fields 1, 7 and 31). Revision D and later MCs, which the IP28 needs, count in 16 MB units instead of 4 MB (Linux ip22-mc.c, OpenBSD ip22_machdep.c). On the IP28 that makes 32, 128 and 512 MB two-subbank banks, and 512 MB was already modelled that way. This PR marks 32 and 128 MB the same way.

Marking them isn't enough on its own. With BNK set and the largest size field, the MC puts the two subbanks 256 MB apart, each mirrored at its own size. A single address mask can't put the second 64 MB subbank there. memcfg_bank_info now also returns that spacing (subbank_span, 0 when the subbanks sit back to back), and plan_bank_slots points those slots at bank_views into the bank's second half. Only the PROM's probe writes a value like that. Once POST writes its final 0x6720_6728 the spacing is 0 again: plain bank entries, mapped by ppmem as before. All of this runs on MEMCFG writes, so the per-access path doesn't change. IP22 and IP24 decodes don't change either.

Are 128 MB banks real IP28 hardware? An IP28 hinv on comp.sys.sgi.admin (August 1996) shows 192 MB, which needs a 128 MB bank next to a 64 MB one. A 1997 post there gives the Indigo2 R10000 maximum as 640 MB (128 + 2 x 256).

Testing

At 6a487b5, on upstream main 45b7f74:

  • cargo test --features jitv2 --lib, debug and release: 2958 passed, 0 failed. New: mc::tests::ip28_128_mb_banks_are_two_subbanks (fails on main: it encodes 128 MB as 0x2720) and ip22_bus::ppmem_tests::ip28_128_mb_bank_answers_the_prom_probe, which drives the PROM's MEMCFG writes through the decode table and checks the addresses it tests. It fails without the subbank views.
  • Indigo2 IP28, IRIX 6.5.22 disk (read-only, overlay), default banks: the PROM writes MEMCFG0 = 0x6720_6728, boots to login, hinv reports 256 MB, halt -p powers off.
  • POST alone with [128, 0, 0, 0], [32, 32, 0, 0], [256, 256, 0, 0] and [512, 512, 0, 0]: final MEMCFG0 is 0x6720_0000, 0x6120_6122, 0x2f20_2f30 and 0x7f20_7f40, with no memory test failure.
  • Indy IP24 and Indigo2 IP22, IRIX 6.5.22, [128, 128, 0, 0]: boot to login, 256 MB, halt -p powers off.

The boots used a binary built before a comment-only edit to the commit.

With the default banks of 128 MB the embedded IP28 PROM fails its
memory diagnostic ("Address 2000000c Expected 00000000 Received
00000001", "No usable memory found"). The model described a 128 MB
bank as one subbank. The PROM sizes a subbank with BNK clear, then sets
BNK and looks for a second one; it found a 128 MB alias and no second
subbank, settled on 256 MB (MEMCFG half 0x2f20), and its data test then
read back words aliased from 128 MB up.

The MC specification's size table gives every other size two subbanks
(fields 1, 7 and 31). Revision D and later count in 16 MB units rather
than 4 MB, so on the IP28 that is 32, 128 and 512 MB, which is how 512
MB was already modelled. Mark 32 and 128 MB the same way.

That alone is not enough. With BNK set and the largest size field
(0x7f20) the MC puts the two subbanks 256 MB apart, each mirrored at its
own size; one address mask cannot place the second 64 MB subbank there.
The decode now reports that spacing, and the bank plan points those
slots at bank views offset into the second half. Only the probe uses
such a value; once POST writes the final 0x6720_6728 the banks are
contiguous again, plain bank entries, and mapped by ppmem as before.

With this the PROM writes 0x6720_6728 for two 128 MB banks and IRIX
6.5.22 reports 256 MB. IP22 and IP24 decodes do not change.
@techomancer
techomancer merged commit 3132f68 into techomancer:main Nov 7, 2026
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