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… to take A debug-build switch, off by default. Writes (and optionally reads) on the pages the host names go into a 1024-entry ring with the ARM cycle, the data byte, DMA_State and whether a locked slice is armed; each locked slice's start is marked too. SnoopTapToken sets the pages and takes the ring over the command channel, the same pull model as SampleWatch, so it can be interleaved with DMA commands on the one serial port.
…takes back The tap had no client of its own, so reading it meant patching one into whatever host program was under test. protocol.py names the token, so test_protocol.py pins it to the firmware, and it pins the DMA state names the printout uses to the order of enum DMA_States.
A take dropped the page cycles the ISR counted while the ring was being sent: SnoopSkipped and SnoopTaps were zeroed after the send, so no reply ever counted them. They now carry into the next take. The reply's flush goes through FlushCmdChannel, since CmdChannel->flush() waits with no deadline for a TCP peer. SnoopActive was written and never read.
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What changed and why
A debug-only bus tap.
isrPHI2records the C64's cycles on pages the host picks into a ring holding the last 1,024 entries. Each entry carries the ARM cycle stamp, the address, the data, the DMA state, and whether a locked slice was armed. The host takes the ring over the control channel withSnoopTapToken(0x64F8).A page flagged as a trigger freezes the ring 64 entries after the first write to it, so the cycles leading up to a crash survive until the host gets back to the port. The tap sits after the
fBusSnoopslot rather than in it, so it keeps recording while Sample Watch holds the slot.It is off by default. It is built only when
DbgSnoopTapis defined inTeensyROM.h, and only in images withFab04_FullDMACapable.tools/bench/snooptap.pyis its client:The protocol is written up in
docs/ControlComms.mdunder "Snoop Tap".The tap was written to chase an intermittent crash under host DMA. It caught the 6510 doing a read-modify-write on
$0318with no DMA set up. Without a record of the cycles before the fault, that would have read as a bad DMA write.What to look at
ISRs.c: the hook is the only codeisrPHI2gains, and only withDbgSnoopTapdefined. With it undefined, nothing outside#ifdef DbgSnoopTapchanges except the token's#define.SnoopTapCommand()inSerUSBIO.inosits in the always-allowed switch ahead of the Busy gate. It touches no state the C64 reads. Cycles the ISR counts while a reply is being sent carry into the next reply.DMAMEMon every tapped cycle. That only matters in aDbgSnoopTapimage, on the pages it is told to watch.How it was verified
npm testpasses, as do the bench tests (python3 -m unittest discover -s tools/bench).test_protocol.pypins the token, and the DMA state names the client prints, to the firmware's definitions. Changing either fails it.$0318capture above. The current commits have not been built withDbgSnoopTapdefined, and the client has not been run against a board.