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1. AMBA-AXI4-Lite-BRAM-Interface AMBA-AXI4-Lite-BRAM-Interface Public

   Synthesizable AMBA AXI4-Lite Interface for on-chip BRAM on Xilinx Artix-7 FPGA with Dual FSMs and 5 Independent Handshake Channels (E3 231, IISc Bangalore).

   Verilog

2. consumer-silicon-soc consumer-silicon-soc Public

   Simulation-first RTL project exploring a CPU-controlled image-processing SoC with Cocotb verification.

3. FPGA-CNN-Hardware-Accelerator-MNIST FPGA-CNN-Hardware-Accelerator-MNIST Public

   Real-Time FPGA CNN Hardware Accelerator for MNIST digit recognition on Xilinx Nexys Video Artix-7 XC7A200T with 120 PE array, Row-Stationary dataflow, BUFGCE clock gating (E3 231, IISc).

   Verilog

4. Iterative-AES256-ASIC-Accelerator Iterative-AES256-ASIC-Accelerator Public

   Iterative AES-256 Cryptographic Accelerator IP with Canright Composite-Field S-Box in 45nm ASIC Synthesis (E0 297, IISc).

   Verilog

5. Keccak-f1600-SHA3-Permutation-Accelerator Keccak-f1600-SHA3-Permutation-Accelerator Public

   Keccak-f[1600] SHA-3 Permutation Cryptographic Accelerator IP in 45nm ASIC Synthesis (E0 297, IISc).

   Verilog

6. RV32I_Single_Cycle_Core RV32I_Single_Cycle_Core Public

   Single-Cycle 32-bit RISC-V (RV32I) Processor Core implemented from scratch in Verilog HDL. Fully synthesizable for AMD Xilinx Artix-7 (Digilent Basys 3) with pure Distributed RAM (LUT RAM) architec…

   Verilog