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Akendall47/README.md

Archie Kendall


About Me

  • Studying Electronics and Computer Engineering at Imperial College London
  • Industry experience:
    • RF Electronic Engineering, Signal and Data Analysis at ETL Systems
    • Aerospace Electronics Engineering + Real-time Control & Filter Algorithm development at GKN Aerospace

Currently building:

  • AI Inference Accelerator + Driver: Simulated INT8 GEMM accelerator with a full driver stack
    • 16x16 systolic array, DMA and AXI-Lite control registers in SystemVerilog, simulated with Verilator
    • C/C++ driver and runtime that controls it through memory-mapped registers
  • PYNQZOOM: A Fractal Accelerator on FPGA: Escape-time fractal renderer running entirely in programmable logic
    • Pool of parallel iterator cores, scheduled by a hardware Mariani-Silver quad-tree
    • Runtime-selectable precision for deep zooms on the PYNQ dev-board

Tech Stacks

Tech Stack


Contribution Graph

contribution snake


Pinned Loading

  1. SAMOS-76/RISC-V-Team7 SAMOS-76/RISC-V-Team7 Public

    SystemVerilog 2

  2. MT_Terminal_Whatsapp MT_Terminal_Whatsapp Public

    Forked from SAMOS-76/A2-MTCA-SS-AK-SO

    This is Terminal WhatsApp: a multi-threaded chat application built in C that runs entirely in the terminal.

    C 1

  3. Custom_C_Shell Custom_C_Shell Public

    Custom Shell Implementation

    C 2

  4. PYNQcast/ServerSide_PYNQ_Raycaster PYNQcast/ServerSide_PYNQ_Raycaster Public

    Server Side for FPGA Raycaster: Reactor/SEDA, EC2, REDIS, DynamoDB, S3

    Python 2

  5. ComPilates ComPilates Public

    A C90 to RISC-V (RV32) compiler written in C++ with Flex and Bison

    HTML

  6. PYNQPANTHERS/fractal-accelerator-rtl PYNQPANTHERS/fractal-accelerator-rtl Public

    HDL source and testbenches for the PL fabric - has both dual_precision and dual_core versions

    SystemVerilog 4